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Showing posts from May 19, 2013

ASCII to Decimal conversion

#include "msp430.h"                     ; #define controlled include file         NAME    main                    ; module name         PUBLIC  main                    ; make the main label vissible                                         ; outside this module         ORG     0FFFEh         DC16    init                    ; set reset vector to 'init' label         RSEG    CSTACK                  ; pre-declaration of segment         RSEG    CODE                    ; place program in 'CODE' segment init:   MOV     #SFE(CSTACK), SP        ; set up stack main:   NOP                             ; main program         MOV.W   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer         mov #30h,r4         mov @r4,r5         sub #30h,r5         inc r4         mov.b r5,0(r4)         JMP $                           ; jump to current location '$'                                         ; (endless loop)         END

Interchange of data blocks

#include "msp430.h"                     ; #define controlled include file         NAME    main                    ; module name         PUBLIC  main                    ; make the main label vissible                                         ; outside this module         ORG     0FFFEh         DC16    init                    ; set reset vector to 'init' label         RSEG    CSTACK                  ; pre-declaration of segment         RSEG    CODE                    ; place program in 'CODE' segment init:   MOV     #SFE(CSTACK), SP        ; set up stack main:   NOP                             ; main program         MOV.W   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer         mov #30h,r4         mov #40h,r5         mov #7,r6 up:     mov.b @r4,r7         mov.b @r5,r8         mov.b r7,0(r5)         mov.b r8,0(r4)         inc r4         inc r5         dec r6         jnz up                 JMP $                           ; jump to cu

32bit addition

#include "msp430.h"                     ; #define controlled include file         NAME    main                    ; module name         PUBLIC  main                    ; make the main label vissible                                         ; outside this module         ORG     0FFFEh         DC16    init                    ; set reset vector to 'init' label         RSEG    CSTACK                  ; pre-declaration of segment         RSEG    CODE                    ; place program in 'CODE' segment init:   MOV     #SFE(CSTACK), SP        ; set up stack main:   NOP                             ; main program         MOV.W   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer         mov #32h,r4         mov #42h,r5         mov #52h,r6         clr r9         mov.w @r4,r7         add.w @r5,r7         mov.w r7,0(r6)         jc skp         mov #1h,r9               skp:  decd.w r4         decd.w r5         decd.w r6         mov.w @r4,r7    

Data block transfer

#include "msp430.h"                     ; #define controlled include file         NAME    main                    ; module name         PUBLIC  main                    ; make the main label vissible                                         ; outside this module         ORG     0FFFEh         DC16    init                    ; set reset vector to 'init' label         RSEG    CSTACK                  ; pre-declaration of segment         RSEG    CODE                    ; place program in 'CODE' segment init:   MOV     #SFE(CSTACK), SP        ; set up stack main:   NOP                             ; main program         MOV.W   #WDTPW+WDTHOLD,&WDTCTL  ; Stop watchdog timer         mov #30h,r4         mov #40h,r5         mov #7,r6      up:   mov.b @r4,r7         mov.b r7,0(r5)               inc r4         inc r5         dec r6         jnz up               JMP $                           ; jump to current location '$'          

Toggle port 1 usning timer

Toggle port 1 usning timer  org 00h  mov TMOD,#01h abov: mov P1,#55h  acall delay  mov P1,#0aah  acall delay  sjmp abov delay: mov TH0,#0ffh        mov TL0,#00h   setb TR0   here:jnb TF0,here   clr TF0   ret   end

ALP to convert Hex to ASCII

ALP to convert Hex to ASCII org 00h mov r0,#30h mov a,@r0   ;operation: put hexa in 30h , u'll get result in next bytes anl a,#0f0h swap a acall ascii inc r0 mov @r0,a dec r0 mov a,@r0 anl a,#0fh acall ascii inc r0 inc r0 mov @r0,a sjmp $ ascii: cjne a,#0ah,nx    nx: jc skp        add a,#07h skp:   add a,#30h ret end

Add even and odd numbers

Add even and odd numbers mov dph,#10h mov r2,#00   ;lower byte ,source pointer mov r6,#7 ; number of bytes in the source address up:mov dpl,r2 movx a,@dptr jb acc.0,odd add a,50h mov 50h,a   ;sum of odd numbers in 50h sjmp lst odd: add a,54h      mov 54h,a ;sum of even numbers in 54h lst:inc r2   djnz r6,up sjmp $ end

Even(5000h) and odd numbers(6000h) --from 1000h

Even(5000h) and odd numbers(6000h) --from 1000h mov r0,#00 mov r1,#00 mov r2,#00   ;lower byte ,source pointer mov r6,#7 ; number of bytes in the source address mov r3,#50h mov r4,#60h mov r5,#10h up:mov dpl,r2 mov dph,r5 movx a,@dptr jb acc.0,odd mov dpl,r1 mov dph,r3 movx @dptr,a inc r1 sjmp lst odd: mov dpl,r0      mov dph,r4 movx @dptr,a inc r0 lst:inc r2   djnz r6,up sjmp $ end

Generation of Fibonacci series

Generation of Fibonacci series org 00h mov r2,#5  ;count of numbers generated from 1 mov 40h,#0 mov 41h,#01 mov r0,#40h mov r1,#41h up:mov a,@r0 add a,@r1 inc r1 inc r0 mov @r1,a djnz r2,up  ;numbers will be seen from 40h sjmp $ end

Comparision logic

compare n1 and n2 if n1<n2 set lsb of 2F,n1>n2 set msb of 2F,n1=n2 clear both org 00h mov r0,#40h mov a,@r0 ;n1 in a inc r0 mov b,@r0 ;n2 in b cjne a,b,nxt  clr 7fh  clr 78h  sjmp last nxt: jc slsb    setb 7fh    clr 78h slsb:clr 7fh      setb 78h   last:sjmp last  end

Decimal up counter

Decimal up counter  org 00h clr a up:inc a  da a  acall delay  sjmp up delay: mov r0,#0ffh      h2:mov r1,#020h h1:mov r2,#0ffh  h:djnz r2,h   djnz r1,h1   djnz r0,h2   ret   end

16 bit multiplication

org 00h mov r0,#42h mov r1,#44h mov a,@r0 mov b,@r1 mul ab mov r2,a mov r3,b  ;result 1 in r2 and r3 dec r0 mov a,@r0 mov b,@r1 mul ab mov r4,a mov r5,b  ;result 2 in r4 and r5 inc r0 dec r1 mov a,@r0 mov b,@r1 mul ab mov r6,a mov r7,b ;result 3 dec r0 mov a,@r0 mov b,@r1 mul ab  ;result 4 mov 50h,a mov 51h,b mov 63h,r2 mov a,r3 add a,r4 mov 62h,a mov a,r5 addc a,#00 mov 61h,a mov a,63h mov 73h,a mov a,r6 add a,62h mov 72h,a mov a,r7 add a,50h mov 64h,a mov a,51h addc a,#00h mov 51h,a mov a,61h add a,64h mov 71h,a mov 70h,51h sjmp $ end

x=0 do addition ,x=1 do substraction ,x=2 do multiplication ,x=3 do division

org 00h mov r0,#40h mov a,@r0 mov r1,a inc r0 mov a,@r0 mov b,a inc r0 mov a,@r0 ; second number is in a cjne r1,#00,n1  add a,b  jnc sk  mov b,#1 sk:mov b,#0h sjmp las n1:cjne r1,#01,n2  add a,b  sjmp las n2:cjne r1,#02,n3 mul ab  sjmp las n3:cjne r1,#03,n4  div ab  sjmp las n4:mov a,#00h  mov b,#00h las:mov 43h,a     mov 44h,b sjmp $ end

a.x=0 do addition ,x=1 do OR ,x=2 do XOR

org 00h mov r0,#40h mov a,@r0 mov r1,a inc r0 mov a,@r0 mov b,a inc r0 mov a,@r0 ; second number is in a cjne r1,#00,n1  add a,b  jnc sk  mov b,#1 sk:mov b,#0h sjmp las n1:cjne r1,#01,n2  orl a,b  sjmp las n2:cjne r1,#02,n3  xrl a,b  sjmp las n3:mov a,#00h  mov b,#00h las:mov 43h,a     mov 44h,b sjmp $ end